Operation:
1 -->; Bit of SR
*SSP - 2 -->; SSP; Format/Offset -->; (SSP);
SSP - 4 -->; SSP; PC -->; (SSP); SSP - 2 -->; SSP;
SR -->; (SSP); Vector Address -->; PC
Assembler Syntax:
TRAP #<vector>
Attributes: Unsized
Description: Causes a TRAP #<vector> exception. The inst-
ruction adds the immediate operand (vector) of the
instruction to 32 to obtain the vector number. The range
of vector values is 0-15, which provides 16 vectors.
Condition Codes:
Not affected.