(d32,An,Rn)

Address

Register Indirect with Index

(bd,An,Xn*Scale)

The operand is in a memory location referenced by an effective
address computed by adding together the contents of the specified address
register, a second data or address register, and an optional displacement.
The displacement could be none, or 16bit or 32bit wide.
The value in the second register can either be a full long word or a sign-
extended word value. This is specified by a .W or .L extension after
the register. If no extension is used, the assembler assumes a word
value.
The Index register can optionally be multiplied with 1, 2, 4, or 8

As ADDRESS register can be used A0 .. A7
As INDEX register can be used A0 .. A7 or D0 .. D7

Assembler Syntax:
(bd,An, Rn)
(bd,An, Rn.W *8)
(bd,An, Rn.L *4)