DIVS

# DIVS

Operation:
` `Destination / Source -->; Destination

Assembler Syntax:
` `DIVS.W <ea>, Dn` `` `32/16 -->; 16r:16q
` `DIVS.L <ea>, Dq` `` `32/32 -->; 32q
` `DIVS.L <ea>, Dr:Dq` `64/32 -->; 32r:32q

Attributes: Size = (Word, Long)

Description: Divides the signed destination operand by the
` `signed source operand and stores the signed result in the
` `destination. The instruction uses one of three forms. The
` `word form of the instruction divides a long word by a word.
` `The result is a quotient in the lower word (least significant
` `16 bits) and the remainder is in the upper word (most
` `significant 16 bits) of the resul. The sign of the remainder
` `is the same as the sign of the dividend.

` `The first long form divides a long word by a long word. The
` `result is a long quotient; the remainder is discarded.

` `The second long form divides a quad word (in any two data
` `registers) by a long word. The result is a long-word quotient
` `and a long-word remainder.

` `Two special condition may arise during the operation:
` `` `1. Division by zero causes a trap.
` `` `2. Overflow may be detected and set before the inst-
` `` `` `ruction completes. If the instruction detects
` `` `` `an overflow, it sets the overflow condition code
` `` `` `and the operands are unaffected.

Condition Codes:

` `X Not affected.
` `N Set if the quotient is negative. Cleared otherwise.
` `` `Undefined if overflow or divide by zero occurs.
` `Z Set if the quotient is zero. Cleared otherwise.
` `` `Undefined if overflow or divide by zero occurs.
` `V Set if the division overflow occurs; undefined if
` `` `divide by zero occurs. Cleared otherwise.
` `C Always cleared.