32 Data Registers (D0-D7,E0-E23)
These registers are for bit and bit field (1 - 32 bits), byte (8 bits), word (16 bits), long-word (32 bits), and quad-word (64 bits) operations. D0-D7 can also be used as index registers in EA calculation.

My expectation the following assembler instructions should be valid.
  move.l d0,e0 
  add.l e0,e0

But apparently not.

Can someone post some code snippets related to vasm and 68080 here.
If possible also related to AMMX.

That would be very much appreciated.

Thanks,

Bastian

I tested it on my v4sa+ and it works fine. (core7.4 os7.1)

CLICK HERE  and make sure you use the latest vasm:
(sun.hasenbraten.de/vasm/index.php?view=bincur  vasmm68k_mot_os3.lha)

asembled with script (link above) to vasm
and in the debugger of devpac i did a single-step execute.

code:
  move.l #$12345678,d0 ;result d0=12345678
  move.l d0,e0
  move.l e0,d1 ;result d1=12345678
  add.l e0,e0
  move.l e0,d2 ;result d2=2468ACF0

Maybe this is also usefull:
CLICK HERE color maped instructions

Bastian Zühlke wrote:

Can someone post some code snippets related to vasm and 68080 here.   If possible also related to AMMX.     That would be very much appreciated.     Thanks,     Bastian

Yes, i will do that.

  move.l #$12345678,-(sp)
  movex.l (sp)+,d0 ;result d0=78563412

;order (32bit)

  perm #@3210,d0,d1 ;result d1=12345678
  perm #@2211,d0,d2 ;result d2=34345656

;shift

  lslq #24,d1,d3  ;result d3=78000000
  ;(high part is not visable in debugger)

;order (64 bit)

  vperm #$01234567,d3,d2,d4 ;result d4=d3=78000000
  vperm #$76543210,d3,d3,d5 ;result d5=56341200
  vperm #$fedcba98,d3,d3,d6 ;result d6=56341200

There is a AMMXdoc.txt and a AMMXQuickRef.pdf
Both very usefull getting that.

can anyone provide the links for those here?

Which version of VASM have you used ? I am using 1.8l which can not assemble your example.

Good luck. ( & i will post more snippets)

Yes, very helpful indeed. Struggling with the TEX8/TEX16/TEX24 instructions. VASM is not supporting them yet.
Does someone has created some macros already ?

  ; result is what you see in debugger
  ; high part is not visable in there

; move.quad = load

  load.q #$8642864286428642,d0 ;result d0=86428642
  load.w #$8642,d1 ;result d1=86428642

  load.q #$0000000071118222,d1 ;result d1=71118222

; 4x add.w

  paddw d0,d1,d2 ;result d2=f7530864

; 4x add.w unsigned & saturated(limited)

  paddusw d0,d1,d3 ;result d3=f753ffff
 
; 8x add.b

  paddb d0,d1,d4 ;result d4=f7530864

; 8x add.b unsigned & saturated(limited)

  paddusb d0,d1,d5 ;result d5=f753ff64

I would like that too.

The animated picture is just to clarify.
It is made of copied Mon030 (atari) parts because i had atari-emulator so i could screen-grab stuff.

I use the same MonAm3.08 from '97 that you use.

loop
  movec ccc,d0 ;cpu clock counter
  bra loop

; just keep single step the ever lasting loop to see the counter change
; usefull to keep track of how much clock cycles a routine used.
; loops every 50 sec at 85Mhz
; (2^32)/(7093790x12)

Thanks. Great way to implement a high precision performance timer.

; setup

  clr.l d0  ;result d0=00000000
  move.l #$03f00401,d1 ;result d1=03f00401
 
  move.l #$80ff4020,d2 ;result d2=80ff4020
  move.l #$22222222,d3 ;result d3=22222222

  move.l d0,d4 ;result d4=00000000
  move.l d1,d5 ;result d5=03f00401

; 8x mul.b , lsr , add.b  (limited)

  pmula d2,d3,d4 ;d4+=(d2*d3)>>8 =11210804
 
; now at full potential

  pmula d2,d3,d5 ;result d5=14ff0c05

; $80*$22 =$1100
; $ff*$22 =$21de
; $40*$22 =$0880
; $20*$22 =$0440

; think RGB mode, a HUD. independent alfa fade.

  load.q #$11ff00002200ff00,d0 ;2 xrgb pixels (red,green)
  load.q #$330000ff44ff00ff,d1 ;2 xrgb pixels (blue,purple)

; chunky convert:
; 4x compress 32bit > 16bit

  pack3216 d0,d1,d2 ;result d2=001f f81f (blue,purple)

;show top part of result in debugger

  lsrq #32,d2,d3 ;result d3=f800 07e0 (red,green)

; 2x uncompress 16bit > 32bit

  unpack1632 d3,d4 ;result d4=0000ff00 (green)

; again
  unpack1632 d2,d5 ;result d5=00ff00ff (purple)

  illegal ;breakpoint

; note
; DEBUG is unaware of the high part of the registers.
; so they sometimes get changed during single step.
; that also includes the 'e' registers and all other new 080 stuff.
;
; just run until breakpoint to see the actual result.

; 32bits rgb = xxxx xxxx rrrr rrrr gggg gggg bbbb bbbb
; 16bits rgb = rrrr rggg gggb bbbb

  load.q #$00000000000000ff,d0

; 8 chunky bytes to 8 planar bytes

  c2p d0,d1 ;result d1=01010101

; 8 planar bytes back to 8 chunky bytes
 
  c2p d1,d2 ;result d2=000000ff

; note
; load.q , store.q
; q means quad-word (page 1-29 motorola reference manual)
; octo-byte , 64-bit

; stupid trick

  fmove.s #1e3,e0  ;e0_as_float

  lsrq #32,e0,d0 ;result d0=408f3fff  hi-part float
  move.l e0,d1 ;result d1=e0000000  low-part float

  fsub.l e0,e0 ;read e0_as_integer subtract that from e0_as_float

  lsrq #32,e0,d2 ;result d2=41c00001
  move.l e0,d3 ;result d3=f3fffe00

; neat trick

  fmove.s #1e3,e0 ;e0_as_float

  lsrq #52,e0,d2 ;result d2=00000408  sign & exponent
  and.w #$7ff,d2 ;result d2=00000408  removed sign
  sub.w #$3ff,d2 ;result d2=9  (normal binary exponent)

; now the exponent is a binair one, not decimal

  fmovecr #$b,fp1 ;log10(2)
  fmul.w d2,fp1
  fmove.l fp1,d3 ;result d3=3  (normal decimal exponent , might be 1 off)

; Store (move.quad : reg > mem)

  load.w #$1234,d0 ; result d0=12341234
  store d0,val1 ; result val1=1234123412341234

; indirect
  load.w #$4567,d6
  move.b #6,d1 ; result d1=6
  storei d1,val2 ; result val2=4567456745674567
  move.b #0,d1 ; result d1=0
  storei d1,val3 ; result val3=1234123412341234
 
; count
  move.l #6,d1 ; result d1=6
  storec d6,d1,val4 ;result val4=4567456745670000
  move.l #3,d1 ; result d1=3
  storec d0,d1,val5 ;result val5=1234120000000000

  DATA

val1 ds.l 2 ;quad
val2 ds.l 2
val3 ds.l 2
val4 ds.l 2
val5 ds.l 2