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V1200 Status Update, 2H 2018

Daniel Sevo

Posts 299
09 Sep 2018 00:08


I guess this is the famous elephant in the room? ;-)

Team is doing great things all the time and with each update the Apollo core is becoming more and more attractive, yet for the large (I'm guessing) A1200 crowd eagerly awaiting a suitable vampire, news are scarce.

I'd never ask for a release date, but it would be nice to know where it fits into the roadmap and if the connector  issue is solved beyond any doubt or if there are any other issues with the design?



Mallagan Bellator

Posts 382
09 Sep 2018 09:27


Daniel Sevo wrote:

I guess this is the famous elephant in the room? ;-)

Itís one of them, yes.
The core is being ported to work on the Cyclone V FPGA, it doesnít just port over easily. They have people from the creators of Cyclone V help them as well


Vojin Vidanovic

Posts 1700
09 Sep 2018 11:05


Daniel Sevo wrote:

I guess this is the famous elephant in the room? ;-)

It has became smaller one :-)

A1200 Vamp is - V4 Vamp with A1200 connector.

So, as V4 Vamp development progresses, so does your expected 1200 model.


Daniel Sevo

Posts 299
09 Sep 2018 16:27


Vojin Vidanovic wrote:

 
Daniel Sevo wrote:

  I guess this is the famous elephant in the room? ;-)
 

 
  It has became smaller one :-)
 
  A1200 Vamp is - V4 Vamp with A1200 connector.
 
  So, as V4 Vamp development progresses, so does your expected 1200 model.
 

 
  Regarding the post 2 steps above, I've been made aware of the hard work the team is putting into "transfering/porting" Cyclone 3 stuff to Cyclone 5.
 
  @Vojin, yea I imagine the V1200 would be similar to standalone minus some I/O ports & connectors + custom A1200 connector. Reason for wondering about the status of the V1200 is related to the fact that we saw screenshots of v4 standalone boards over a year ago. So I'm just curtious if the V1200 is next in line or..?
  Also if there are some new or other issues/concerns with that design that still need to be adressed or if its as simple as poor Majsta being flooded by the V500, V600 backlog. Which of course sounds pretty reasonable considering the daunting task at hand.
  So as I said, not asking for release dates, more like "where in the cue is the V1200 currently stuck and if "natural priority" is the only reason for it" ;-)
 


Mallagan Bellator

Posts 382
09 Sep 2018 16:47


All good points. I wish for an update from the team


Stefano Briccolani

Posts 495
09 Sep 2018 18:17


I think the production of v500 and the new v600 board were the main factor behind the v1200 delay. Production takes time from Majsta. We will see, but in my opinion the next vampire board will be the v1200, then will come the v4 standalone (that needs a complete core 3 and a lot of drivers).


Tim D

Posts 65
09 Sep 2018 20:36


Mallagan Bellator wrote:

  The core is being ported to work on the Cyclone V FPGA, it doesnít just port over easily. They have people from the creators of Cyclone V help them as well

So do we have sort of an AOS 4.1 FE A1222 Tabor deja-vu?????



Vojin Vidanovic

Posts 1700
09 Sep 2018 21:03


Tim D wrote:

  So do we have sort of an AOS 4.1 FE A1222 Tabor deja-vu?????
 

 
  I DONT SEE any similarities between
 
  a) Steven lagging on buggy SATA drivers (as well as for x5000) and brothers lagging on adding another PPC to OS (even I suppose they were aware of Tabors CPU Before us)
  AND
  b) Adopting FPGA cores from one board to another.
 
  There were few unexpected events (like in Civ) that delayed the things, but did not destroy it completely.
 
 
  - Majsta got Kippers job because of some Chinese faulty parts delivery. Ah, effects of globalization!
  - There were serious A500 bugs with V4 cards that prevented using it    or similar (timing issues?)
  - It seems that Cyclones aren't as portable as Altera claims in their promo, but yet should be easier then porting to completely other FPGA board (like some proposed at some points of time).
 
  Good thing is meanwhile GOLD2 core outlived itself with 11th release bringing nice improvements.
 
  Even GOLD3 isn't out, its getting ironed day by day.
 
  So things aren't best, but not worse either.
 
CORE 2.11 feats

OLD2.11 will introduce some very interesting feature like blitter improvement, which should fix lot of badly written games running on WHDLoad that where messing with IRQ a bit too much.

FPU has also been improved by a large margin: we were able to use bit of remaining FPGA space to extend precision of FPU up to 50Bit. This improvement fixes Elude RTG demos that were affected by the « date bug » reported on A1k. MacOS emulation was also affected by this (you could see it when running Warcraft 2, intro movie was a slideshow). Kiero helped us to address this issue and we thank him for that, thanks man!

We also introduced Out-of-Order execution on FPU instructions, which speeds up operation by another great margin when software takes advantage of it. For example, POVray likes it very much and calculation is now faster on 3D rendering scenes.

Team is also working on ICache Prefetch. This feature will also speed up lot of programs that can take advantage of it. This one is not trivial and need to be implemented conscientiously to not introduce unwanted behaviour. If it gets good enough, it will make its way in GOLD2.11.

All in one, we are super excited about bringing GOLD2.11 to all, it will make Vampire V2 even faster while improving compatibility with old games.

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