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Cyclone V Question

Daniel Sevo

Posts 275
03 Nov 2018 00:17


Howdy,
As far as I can tell the V4 board (at least a V500 version shown in public) used this particular Altera Cyclone model:

EXTERNAL LINK 
If link doesnt work, its the Cyclone V E with part number "5CEFA5F23C8N"
  Data sheet says:

Number of Logic Elements: 77000
Number of Logic Array Blocks - LABs: 29080
Number of I/Os: 240 I/O
Operating Supply Voltage: 1.1 V
...
..
.
Brand: Intel / Altera
Embedded Block RAM - EBR: 424 kbit
Maximum Operating Frequency: 800 MHz

Now.. Its that last line there that got me confused. What exactly does that number mean? Is it a meaningless theoretical maximum operating frequency that can never be reached IRL or what?

 


Marlon Beijer

Posts 160
03 Nov 2018 01:17


Daniel Sevo wrote:
  Is it a meaningless theoretical maximum operating frequency that can never be reached IRL or what?

Yes. It can only run at that speed for very simple setups. The more complex your logic is, the less your maximum will be. Afaik.


Andrew Miller

Posts 210
03 Nov 2018 02:45


That's a shame, can you imagine the apollo core running any Amiga at 800Mhz XD


Vojin Vidanovic

Posts 1596
03 Nov 2018 06:53


Andrew Miller wrote:

  That's a shame, can you imagine the apollo core running any Amiga at 800Mhz XD
 

 
  There is no shame. It uses one model now,in few years we will have new board IF we support current. There is easy line of progress.
 
  Here is "local rumor mill" - what is expected of 400Mhz 080 (or ~x5-6 of current V4 X11 test core) on high end FPGA which is way to expensive for mass market now. But might be V6 or V8. That is 600Mhz 060 equivalent. But that is what we might come to if we continue "the Vamp Warp speed" :-)
  EXTERNAL LINK 


Thumptech 1

Posts 9
03 Nov 2018 08:38


I dream that the V4 standalone will reap enough sales to fund an ASIC and get us into GHz territory.


Vojin Vidanovic

Posts 1596
03 Nov 2018 10:07


thumptech 1 wrote:

  I dream that the V4 standalone will reap enough sales to fund an ASIC and get us into GHz territory.
 

 
  I believe its too fast route, it might be only possible via V4 Classic and V4 Standalone sales combined.
 
  But there would be no shame in one V6 model before going ASIC :-)
 
  ONE day, such "Arria style V6+" Vamp could also invade desktop PCs (or what is left of them :-) with PCI-E 8X based FPGA card. As well as "Amiga"Ones - heh, if Trevor was more innovative this could be real "Xena"
 
  Current Ali Express designer board
  EXTERNAL LINK


Daniel Sevo

Posts 275
03 Nov 2018 17:24


So, question is then what clocks are possible on this Cyclone VE once you reach the complexity of the Apollo core.. ;-)
  Ive seen multipliers set to 11 but IDK  the actual base frequency.
 
  Also, do we see a great variation of the max achievable clock within one batch of same model part of Cyclones?
 
  (Btw, this particular part has price of 90 euros at Mouser, but as you can see (if you start browsing around) theres a zillion slightly different models of the Cyclone V E ranging from cheap 30euro  to 360 euros / unit.. And yes thats for the Cyclon V E.. Then you have a bunch other models of the Cyclone V)
 
 


Daniel Sevo

Posts 275
03 Nov 2018 17:40


DBL post, Delete
 


Ian Parsons

Posts 200
04 Nov 2018 12:42


I think I've seen multipliers of 12 or 13 suggested as plausible for the V5 maybe slightly higher but not a huge leap in clock speed. This is for the base frequency of the accelerator of the 68000 powered Amigas which is approximately either 7.09MHz for PAL machines or 7.16MHz for NTSC ones.

The V2 has had some "safe" cores with an x10 multiplier and some experimental test cores with x14 (x15?) that only worked on rare boards/set-ups. So there is a wide range of performance between systems that may be down to the Cyclone chip and/or other factors like power supply regulation. I don't know if the V5 accelerators with have a similar range for possible stable performance.

The speed rating printed on chips don't always reflect the true limit as they may work at a higher speed but not reach the level of next graduation used to market the chip or they may just have more high speed chips than they want so they mark them as lower (unless you get a fake then it may be a lower speed chip remarked as higher).

The range of Cyclone FPGAs is a little bewildering and the pricing and supply for low volume production can be tricky.


Tango One

Posts 101
04 Nov 2018 12:56


Could any from the apollo team say if you have made any "test cards" using Arria 10. ?


Vojin Vidanovic

Posts 1596
04 Nov 2018 22:19


tango one wrote:

Could any from the apollo team say if you have made any "test cards" using Arria 10. ?

I believe its not fixed to certain FPGA, it might be some good price/performance FPGA offer, likely connected to Cyclone.

-------------------------------
Rumor mill was based on Gunnars statement that Apollo was tested on high end FPGA and has reached couple hundred Mhz, but is way too expensive for mass market. FPGA prices can go up and down, but usually go down every few years with new gen, like all other h/w.
-----------------------------------------
There is Artis statement that also high end FPGA would be needed for Odyssey

"Odyssey is the best NG browser. It supports new technologies but for the classic it is too demanding.
  Only fast FPGAs could pull it off like the announced Vampire card on Arria 10, which is only planned. As I wrote above, the next Vampire will be based on Cyclone V, which is at least 20% faster than Cyclone 3." -- Artur Jarosik"
-------------------------
And there is Renaud Schweingrubers statement a deluxe Vampire (Buggari GX or some fancy car) could be Cyclone high end.


Daniel Sevo

Posts 275
04 Nov 2018 22:29


tango one wrote:

      Could any from the apollo team say if you have made any "test cards" using Arria 10. ?
     

     
      In case no official reply "shows up", Ill speculate "no". I base this on the fact that even migration from Cyclone III to V was tricky, and thats in the same "family" (cyclone)
     
      Arria 10 is a different beast and although Quartus II has something called "vertical migration" for "supported devices", I think it would simply be a misguided effort to  spend time on since even if you succeed getting your code to "run" nicely on Arria10 you have a product that is going to very expensive and exclusive. The cheapest Arria 10 is over 250 euro, but most models are actually much more expensive than that. This is something I (personally) dont think supports the overall strategy/goal of this project (modern-ish 68k Amiga experience for the masses ;-)
  I'm sure they're already considerin the next step for a higher end FPGA but I doubt it will be Arria 10.
 
  Edit: Or maybe they did try it on a very high end board simply to check how far they can realistically get without an ASIC.
     


Vojin Vidanovic

Posts 1596
05 Nov 2018 04:14


Daniel Sevo wrote:

  Edit: Or maybe they did try it on a very high end board simply to check how far they can realistically get without an ASIC.

Yes, it was stated (as you explained) for several times, that Vampire is cost/effective product and will not use current high end FPGAs. Which does not mean if prices fall enough in few years,something like Arria 10 (but Cyclone style) wont happen.

It surely wont happen if we don't support V4.



M Rickan

Posts 173
05 Nov 2018 23:56


Daniel Sevo wrote:

      In case no official reply "shows up", Ill speculate "no". I base this on the fact that even migration from Cyclone III to V was tricky, and thats in the same "family" (cyclone)

I may be imagining this, but didn't Majsta say that he had prototyped higher-end hardware but decided to hold off as the material costs were high and the programming effort would be significant?

Gunnar never seems to bite on this one but I'd love to know what type of theoretical performance an ASIC would provide relative to the cost.

posts 14